High frequency switch circuit

ABSTRACT

A high-frequency switch circuit has a plurality of high-frequency switches for passing and blocking a high-frequency signal between an input terminal and an output terminal depending on a control potential applied as a control signal, a high-frequency detecting terminal for detecting high-frequency signal passing through the high-frequency switch which is in ON-state, and a voltage boosting circuit for generating a potential for increasing the control potential applied to the high-frequency switch which is in ON-state in order to increase difference between the control potential applied to the high-frequency switch which is in an ON-state and the control potential applied to the high-frequency switch which is in an OFF-state, depending on an intensity or amplitude of the detected high-frequency signal.

TECHNICAL FIELD

The present invention relates to a high-frequency switch circuit, andmore particularly to a high-frequency switch circuit which is of a smallsize and is capable of switching between high electric power levels.

BACKGROUND ART

Known high-frequency switch circuits that are controlled by controlpotentials which are input as control signals employ field-effecttransistors (FETs) or diodes. For example, Japanese Patent Laid-openApplication No. 8-139014 (JP-A-08-139014) discloses a high-frequencyswitch circuit having a SPDT (Single-Pole, Double-Throw) structure whichis made up of a plurality of cascaded FETs integrated on a GaAssubstrate, as a semiconductor integrated circuit (IC).

FIG. 1 shows such a conventional SPDT circuit by way of example. Thehigh-frequency switch circuit shown in FIG. 1 has three high-frequencyterminals 901 to 903 and two control potential input terminals 911, 912for being supplied with control potentials as control signals from anexternal circuit, high-frequency terminal 901 serving as a commonterminal. N-channel FETs 931 to 935 having respective channels(drains-sources) connected in cascade are connected betweenhigh-frequency terminal 901 and high-frequency terminal 902. Similarly,N-channel FETs 936 to 940 having respective channels connected incascade are connected between high-frequency terminal 901 andhigh-frequency terminal 903. FETs 931 to 940 have respective gatesconnected to ends of respective resistive elements 951 to 960. Theopposite ends of resistive elements 951 to 955 that are connected to thegates of FETs 931 to 935 are connected in common to control signal inputterminal 911, and the opposite ends of resistive elements 956 to 960that are connected to the gates of FETs 936 to 940 are connected incommon to control signal input terminal 912.

In this configuration, control potentials having binary levels, i.e., ahigh level and low level, are complementarily applied as control signalsfrom an external circuit to control potential input terminals 911 and912 for controlling the high-frequency switch circuit to performswitching operation. Specifically, when a high-level potential isapplied to control potential input terminal 911 and a low-levelpotential is applied to control potential input terminal 912, FETs 931to 935 are turned on and FETs 936 to 940 are turned off, connectinghigh-frequency terminals 901 and 902 to each other and disconnectinghigh-frequency terminals 901 and 903 from each other. Conversely, when alow-level potential is applied to control potential input terminal 911and a high-level potential is applied to control potential inputterminal 912, FETs 931 to 935 are turned off and FETs 936 to 940 areturned on, disconnecting high-frequency terminals 901 and 902 from eachother and connecting high-frequency terminals 901, 903 to each other.

In recent years, devices equipped with high-frequency switch circuitsare designed for being supplied with lower power supply voltages forlower electric power consumption, and hence control potentials to beapplied to high-frequency switch circuits tend to be lower. The maximumhandling power P_(max) that can be handled by the conventionalhigh-frequency switch circuit shown in FIG. 1 is expressed by:P_(max)=2(n(V_(H)−V_(L)−V_(T)))²/Z₀  (1)where V_(H) represents the high-level potential of switch controlsignal, V_(L) the low-level potential of switch control signal, n thenumber of FETs connected in cascade, V_(T) the threshold voltage of theFETs, and Z₀ the impedance of the measuring system. When the high-levelcontrol potential of the switch becomes lower, V_(H) in equation (1)becomes lower, resulting in a reduction in the handling power. Thoughthe handling power can be increased by increasing the number of FETsconnected in cascade, the increased number of FETs is liable to acorresponding increase in the chip area of the high-frequency switchcircuit that is constructed as an integrated circuit.

Japanese Patent Laid-open Application No. 10-84267 (JP-A-10-084267)discloses a high-frequency switch circuit wherein, in the case of thatthe number n of cascaded FETs is 1, in order to substantially increasethe control potential applied to the gate of the FET, a portion of ahigh-frequency signal that is input from a high-frequency signal path tothe switch is detected to generate a DC potential proportional to thewave crest of the high-frequency signal, and the DC potential is appliedas a control potential to the gate of the FET depending on a controlsignal from an external circuit.

The high-frequency switch circuit with a plurality of cascaded FETs isdisadvantageous in that as the control potential is lowered, thehandling power is lowered, and that if the handling power is to beincreased, then the number of cascaded FETs is increased, resulting inan increase in the size of the high-frequency switch circuit constructedas an integrated circuit.

The high-frequency switch circuit as disclosed in JP-A-10-084267 isproblematic in that in order to make a selection as to whether the DCpotential generated from the high-frequency signal is to be applied tothe gate of the FET or not, the FET for high-frequency switching and aselector circuit, i.e., the switch circuit and a power supply and acontrol signal for controlling the switch circuit, are required, withthe result that the chip area of the high-frequency switch circuitconstructed as an integrated circuit tends to increase.

DISCLOSURE OF THE INVENTION

It is an object of the present invention to provide a high-frequencyswitch circuit which is of a smaller size and has a higher handlingpower in its operation at lower control potentials.

According to the present invention, a high-frequency switch circuit hasa circuit for generating a potential depending on the amplitude of ahigh-frequency signal that is input, the potential being greater when ahigh-frequency switch is in an ON-state and smaller when thehigh-frequency switch is in an OFF-state. The generated potential isadded to a control potential.

A high-frequency switch circuit according to the present inventionincludes a plurality of high-frequency switch means for passing andblocking a high-frequency signal between an input terminal and an outputterminal depending on a control potential applied as a control signal,detecting means for detecting the high-frequency signal which passesthrough the high-frequency switch means, and a control potentialgenerating circuit for changing the control potential applied to atleast one of the plurality of high-frequency switch means in order toincrease the difference between the control potential applied to thehigh-frequency switch means which is in an ON-state and the controlpotential applied to the high-frequency switch means which is in anOFF-state, depending on the amplitude of the high-frequency signaldetected by the detecting means.

According to a first aspect of the present invention, a high-frequencyswitch circuit has a plurality of high-frequency switch means forpassing and blocking a high-frequency signal between an input terminaland an output terminal depending on an applied control potential,detecting means for detecting the high-frequency signal which passesthrough the high-frequency switch means which is in an ON-state, and acontrol potential generating circuit for generating a potential toincrease the control potential applied to the high-frequency switchmeans which is in an ON-state in order to increase the differencebetween the control potential applied to the high-frequency switch meanswhich is in an ON-state and the control potential applied to thehigh-frequency switch means which is in an OFF-state, depending on theamplitude or intensity of the high-frequency signal detected by thedetecting means. The control potential generating circuit comprises avoltage boosting circuit only or a combination of a voltage boostingcircuit and a voltage lowering circuit.

According to the first aspect, in the high-frequency switch circuit, thecontrol potential is increased by the control potential generatingcircuit depending on the amplitude of the high-frequency signal that isinput. If the control potential is increased in the same manner for afield-effect transistor (FET) which is in an ON-state and an FET whichis in an OFF-state, then V_(H)−V_(L) in the above equation (1) remainsunchanged, and hence the handling power is not increased. According tothe present invention, an increase in the control potential on the FETin an ON-state is made greater than an increase in the control potentialon the FET in an OFF-state. As a result, V_(H)−V_(L) in the equation (1)increases, thereby increasing the handling power.

According to a second aspect of the present invention, a high-frequencyswitch circuit has a plurality of high-frequency switch means forpassing and blocking a high-frequency signal between an input terminaland an output terminal depending on an applied control potential,detecting means for detecting the high-frequency signal which passesthrough the high-frequency switch means which is in an ON-state, and acontrol potential generating circuit for generating a negative potentialto lower the control potential applied to the high-frequency switchmeans which is in an OFF-state in order to increase the differencebetween the control potential applied to the high-frequency switch meanswhich is in an ON-state and the control potential applied to thehigh-frequency switch means which is in an OFF-state, depending on theamplitude or intensity of the high-frequency signal detected by thedetecting means. The control potential generating circuit comprises avoltage lowering circuit only or a combination of a voltage boostingcircuit and a voltage lowering circuit.

According to the second aspect, in the high-frequency switch circuit,the control potential is lowered by the control potential generatingcircuit depending on the amplitude of the high-frequency signal that isinput. If the control potential is lowered in the same manner for afield-effect transistor (FET) which is in an ON-state and an FET whichis in an OFF-state, then V_(H)−V_(L) in the equation (1) remainsunchanged, and hence the handling power is not increased. According tothe present invention, a reduction in the control potential on the FETin an OFF-state is made greater than a reduction in the controlpotential on the FET in an ON-state. As a result, V_(H)−V_(L) in theequation (1) increases, thereby increasing the handling power.

According to the first and second aspects described above of the presentinvention, the gate potential of the FET in the ON-state side or theOFF-state side is increased or lowered to increase V_(H)−V_(L) inequation (1), thereby increasing the handling power. Therefore, ahigh-frequency switch circuit may be constructed to incorporate both thearrangements according to the first and second aspects.

According to the present invention, the control potential generatingcircuit increases the difference between the control potential appliedto the high-frequency switch means which is in an ON-state and thecontrol potential applied to the high-frequency switch means which is inan OFF-state, as the input amplitude of the high-frequency signaldetected by the high-frequency switch means increases. According to thepresent invention, therefore, V_(H)−V_(L) indicated in the equation (1)increases, and the handling power can be increased without increasingthe number n of FETs connected in cascade. The high-frequency switchcircuit does not require control signals from an external circuit exceptfor control potential signals of switches, ie., switching signals.

According to the first aspect of the invention, the control potentialgenerating circuit automatically makes the magnitude of an increase inthe potential greater when the high-frequency switch means is in anON-state and makes the magnitude of an increase in the potential smallerwhen the high-frequency switch means is in an OFF-state, depending onthe ON-state and the OFF-state of the high-frequency switch means.Therefore, it is not necessary to control the increase in the controlpotential. Similarly, according to the second aspect of the invention,the control potential generating circuit automatically makes themagnitude of a reduction in the potential greater when thehigh-frequency switch means is in an OFF-state and makes the magnitudeof a reduction in the potential smaller when the high-frequency switchmeans is in an ON-state, depending on the ON-state and the OFF-state ofthe high-frequency switch means. Consequently, it is not necessary tocontrol the reduction in the control potential.

According to the present invention, therefore, even if a controlpotential is low, a high-frequency switch circuit having a high handlingpower capability can be realized in a small chip area.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram showing the arrangement of a conventionalhigh-frequency switch circuit;

FIG. 2 is a block diagram showing a high-frequency switch circuitaccording to a first embodiment of the present invention;

FIG. 3 is a block diagram illustrative of high-frequency detection inthe circuit shown in FIG. 2;

FIGS. 4 to 8 are circuit diagrams showing specific examples of thearrangements of potential dividing elements;

FIG. 9 is a block diagram illustrating a high-frequency switch circuitwhich employs resistive elements as potential dividing elements;

FIG. 10 is a block diagram illustrating a high-frequency switch circuitwhich employs inductive elements as potential dividing elements;

FIG. 11 is a block diagram illustrating a high-frequency switch circuitwhich employs capacitive elements as potential dividing elements;

FIGS. 12 to 15 are circuit diagrams showing specific examples of thearrangements of voltage boosting circuits;

FIGS. 16 and 17 are circuit diagrams showing specific examples of thearrangements of high-frequency switches;

FIGS. 18 and 19 are circuit diagrams showing specific circuitarrangements of the high-frequency switch circuit according to the firstembodiment;

FIG. 20 is a block diagram showing a high-frequency switch circuitaccording to a second embodiment of the present invention;

FIG. 21 is a block diagram showing a high-frequency switch circuitaccording to a third embodiment of the present invention;

FIG. 22 is a block diagram showing a high-frequency switch circuitaccording to a fourth embodiment of the present invention;

FIG. 23 is a circuit diagram showing a specific circuit arrangement ofthe high-frequency switch circuit according to the fourth embodiment;

FIG. 24 is a block diagram showing a high-frequency switch circuitaccording to a fifth embodiment of the present invention;

FIGS. 25 and 26 circuit diagrams showing specific circuit arrangementsof the high-frequency switch circuit according to the fifth embodiment;

FIG. 27 is a block diagram showing a high-frequency switch circuitaccording to a sixth embodiment of the present invention;

FIG. 28 is a circuit diagram showing a specific circuit arrangement ofthe high-frequency switch circuit according to the sixth embodiment;

FIG. 29 is a block diagram showing a high-frequency switch circuitaccording to a seventh embodiment of the present invention;

FIGS. 30 to 32 are circuit diagrams showing specific examples of thearrangements of voltage lowering circuits;

FIG. 33 is a circuit diagram showing a specific circuit arrangement ofthe high-frequency switch circuit according to the seventh embodiment;

FIG. 34 is a block diagram showing a high-frequency switch circuitaccording to an eighth embodiment of the present invention;

FIG. 35 is a block diagram showing another arrangement of thehigh-frequency switch circuit according to the eighth embodiment;

FIG. 36 is a circuit diagram showing a specific example of a potentialcombining circuit;

FIGS. 37 and 38 are circuit diagrams showing specific circuitarrangements of the high-frequency switch circuit according to theeighth embodiment;

FIG. 39 is a block diagram showing a high-frequency switch circuitaccording to a ninth embodiment of the present invention;

FIG. 40 is a circuit diagram showing a specific circuit arrangement ofthe high-frequency switch circuit according to the ninth embodiment;

FIG. 41 is a block diagram showing a high-frequency switch circuitaccording to a tenth embodiment of the present invention; and

FIG. 42 is a circuit diagram showing a specific circuit arrangement ofthe high-frequency switch circuit according to the tenth embodiment.

BEST MODE FOR CARRYING OUT THE INVENTION

Preferred embodiments of the present invention will be described belowwith reference to the drawings.

FIG. 2 is a block diagram showing a schematic arrangement of ahigh-frequency switch circuit according to a first embodiment of thepresent invention.

The high-frequency switch circuit shown in FIG. 2 is suitable for beingarranged as a semiconductor integrated circuit, and is configured as anSPDT circuit. The high-frequency switch circuit has high-frequencyterminal 101 as a common terminal, first high-frequency circuit section151 having an input terminal connected to high-frequency terminal 101,high-frequency terminal 102 connected to an output terminal of firsthigh-frequency circuit section 151, second high-frequency circuitsection 152 having an input terminal connected to high-frequencyterminal 101, high-frequency terminal 103 connected to an outputterminal of second high-frequency circuit section 152, first and secondcontrol potential input terminals 111, 112 for being supplied with apair of complementary control potentials, i.e., control signals, firstvoltage boosting circuit 131 having an input terminal connected to firstcontrol potential input terminal 111, and second voltage boostingcircuit 132 having an input terminal connected to second controlpotential input terminal 112.

Each of high-frequency circuit sections 151, 152 has a control terminaland a high-frequency detecting terminal in addition to the input andoutput terminals, and connects or disconnects the input and outputterminals depending on a control potential that is applied as a controlsignal to the control terminal. Each of high-frequency circuit sections151, 152 has a high-frequency detecting terminal for detecting andoutputting the intensity or amplitude of a high-frequency signal thatpasses therethrough when it is turned on. The high-frequency circuitsections may comprise, for example, a high-frequency switch made up ofcascaded FETs (Field-Effect Transistors) and a circuit for detecting ahigh-frequency signal, as described later.

First voltage boosting circuit 131 serves to supply the control terminalof corresponding first high-frequency switch circuit section 151 with acontrol signal (control potential) that is input to first controlpotential input terminal 111. When first high-frequency switch circuitsection 151 is in an ON-state, first voltage boosting circuit 131increases the potential of the control signal supplied to firsthigh-frequency switch circuit section 151. First voltage boostingcircuit 131 has a high-frequency detecting terminal connected to thehigh-frequency detecting terminal of first high-frequency switch circuitsection 151. Similarly, second voltage boosting circuit 132 serves tosupply the control terminal of second high-frequency switch circuitsection 152 with a control signal (control potential). When secondhigh-frequency switch circuit section 152 is in an ON-state, secondvoltage boosting circuit 132 increases the potential of the controlsignal input from second control potential input terminal 112 andsupplies the control signal to second high-frequency switch circuitsection 152. Second voltage boosting circuit 132 has a high-frequencydetecting terminal connected to the high-frequency detecting terminal ofsecond high-frequency switch circuit section 152.

High-frequency detection in high-frequency switch circuit sections 151,152 will be described below. As shown in FIG. 3, the high-frequencydetection can be achieved by connecting potential dividing circuitsbetween the input and output terminals of the high-frequency switches inthe high-frequency switch circuit sections. Each of the potentialdividing circuits has two potential dividing elements connected inseries to each other, with the high-frequency detecting terminalextending from the midpoint between the potential dividing elements.FIG. 3 is a diagram showing the high-frequency detection in thehigh-frequency switch circuit shown in FIG. 2. In FIG. 3, potentialdividing elements 141, 142 are connected in series between the input andoutput terminals of high-frequency switch 121 of first high-frequencyswitch circuit section 151, and the midpoint (junction) betweenpotential dividing elements 141, 142 is used as high-frequency detectingterminal 211 of high-frequency switch circuit section 151. Likewise,potential dividing elements 143, 144 are connected in series between theinput and output terminals of high-frequency switch 122 of secondhigh-frequency switch circuit section 152, and the midpoint (junction)between potential dividing elements 143, 144 is used as high-frequencydetecting terminal 212 of high-frequency switch circuit section 152. Anyof resistive elements, capacitive elements, and inductive elements maybe used as potential dividing elements 141 to 144, and an arrangement inwhich resistive elements, capacitive elements, or inductive elements areconnected either in series or parallel to each other may be used aspotential dividing elements 141 to 144.

Specific examples of potential dividing elements 141 to 144, as typifiedby potential dividing element 141, will be described below.

FIG. 4 shows potential dividing element 141 comprising resistive element51, FIG. 5 shows potential dividing element 141 comprising inductiveelement 91, FIG. 6 shows potential dividing element 141 comprisingcapacitive element 41, FIG. 7 shows potential dividing element 141comprising resistive element 52 and inductive element 92 which areconnected in series to each other, and FIG. 8 shows potential dividingelement 141 comprising resistive element 53 and capacitive element 42which are connected in series to each other.

High-frequency switch circuits employing such potential dividingelements are specifically illustrated in FIGS. 9 to 11.

FIG. 9 shows an example of the circuit illustrated in FIG. 3 whereresistive elements 51 are employed as potential dividing elements 141 to144, FIG. 10 shows an example of the circuit illustrated in FIG. 3 whereinductive elements 91 are employed as potential dividing elements 141 to144, and FIG. 11 shows an example of the circuit illustrated in FIG. 3where capacitive elements 41 are employed as potential dividing elements141 to 144.

Voltage boosting circuits 131, 132 will be described below. Sincevoltage boosting circuits 131, 132 are usually identical in circuitarrangement, voltage boosting circuit 131 will be described below.

FIG. 12 shows an example of voltage boosting circuit 131. Resistiveelement 54 is connected between input terminal 204 and output terminal205 of voltage boosting circuit 131. Diode element 21 is connectedparallel to resistive element 54. The anode of diode element 21 isconnected to input terminal 204, and the cathode thereof is connected tooutput terminal 205. Capacitive element 43 is connected betweenhigh-frequency detecting terminal 206 and output terminal 205 of voltageboosting circuit 131. As shown in FIG. 13, resistive element 55 may beinserted between input terminal 204 and the anode of diode element 21.As shown in FIG. 14, resistive element 56 may be inserted between outputterminal 205 and the cathode of diode element 21. As shown in FIG. 15,resistive element 57 may be connected in series to capacitive element43. Though resistive element 57 is connected in series to capacitiveelement 43 in the example shown in FIG. 15, a circuit constructed of aninductive element, a resistive element, and a capacitive element may beinserted instead of resistive element 57 shown in FIG. 15.

In this voltage boosting circuit, capacitive element 43 connectedbetween high-frequency detecting terminal 206 and output terminal 205may be replaced with a signal detector including a capacitive element.The signal detector is constructed of a capacitive element only or acircuit including a capacitive element. The circuit including acapacitive element is constructed of a circuit including all or some ofa resistive element, an inductive element, and a capacitive element, anda capacitive element connected in series to the circuit.

High-frequency switches 121, 122 will be described below. Thehigh-frequency switches should preferably comprise an FET having a gateto which a control signal, i.e., a control potential, is applied via aresistor, or a cascade connection of such FETs. If FETs are connected incascade, then the FETs are combined with respective resistors whose endsare connected to the gates of the corresponding FETs and whose otherends are connected in common to a control terminal to which a controlsignal is input. Since high-frequency switches 121, 122 are usuallyidentical in circuit arrangement, high-frequency switch 121 willtypically be described below.

High-frequency switch 121 shown in FIG. 16 has two N-channel FETs 1, 2having respective channels connected in cascade between input terminal201 and output terminal 202 and respective gates connected to ends ofrespective resistive elements 61, 62 whose other ends are connected incommon to control terminal 203. While two FETs are connected in cascadein FIG. 16, a single FET may be employed or three or more FETs may beconnected in cascade.

In order to equalize the drain-to-source voltages of the cascaded FETs,resistive elements having a resistance of several kilo-ohms or more maybe connected parallel to the drains and sources of the respective FETs.FIG. 17 shows a high-frequency switch having resistive elementsconnected between the drains and sources. Specifically, high-frequencyswitch 121 shown in FIG. 17 has four FETs 1 to 4 having respectivechannels connected in cascade between input terminal 201 and outputterminal 202 and resistive elements 71 to 74 having a resistance ofseveral kilo-ohms or more interconnecting the drains and sources ofrespective FETs 1 to 4. FETs 1 to 4 have respective gates connected toends of respective resistive elements 61 to 64 whose other ends areconnected in common to control terminal 203.

While four FETs 1 to 4 are connected in cascade in FIG. 17, a single FETmay be connected between input terminal 201 and output terminal 202, orother than four FETs may be connected in cascade.

FIG. 18 shows a specific arrangement of the circuit shown in FIG. 3,which includes four N-channel FETs connected in cascade as each ofhigh-frequency switches 121, 122, resistive element 51 as each ofpotential dividing elements 141 to 144, and the circuit shown in FIG. 12as each of voltage boosting circuits 131, 132. Similarly, FIG. 19 showsanother specific arrangement of the circuit shown in FIG. 3, whichincludes four N-channel FETs connected in cascade as each ofhigh-frequency switches 121, 122, resistive element 51 as each ofpotential dividing elements 141 to 144, and the circuit shown in FIG. 13as each of voltage boosting circuits 131, 132.

Operation of the high-frequency switch circuit according to the firstembodiment will be described below.

Referring again to FIG. 3, control potentials having binary levels,i.e., high and low levels, are complementarily applied as controlsignals to control potential input terminals 111, 112. It is assumedthat a high-level potential is applied to control potential inputterminal 111 and a low-level potential is applied to control potentialinput terminal 112. When a high-frequency signal is input tohigh-frequency terminal 101 at this time, since high-frequency switch121 is in an ON-state, the signal is output to high-frequency terminal102. Therefore, a signal having the same amplitude as the high-frequencyinput signal can be detected at high-frequency detecting terminal 211.Since high-frequency switch 122 is in an OFF-state, no signal is outputto high-frequency terminal 103. In an ordinary usage mode, ashigh-frequency terminals 101 to 103 are terminated, the amplitude of thesignal at high-frequency terminal 102 connected to high-frequency switch122 that is in an OFF-state is considered to be substantially zero if asignal component flowing in from the potential dividing circuit isignored. Therefore, a signal having a reduced amplitude produced whenthe high-frequency input signal is divided by the potential dividingcircuit is detected at high-frequency detecting terminal 212.

Voltage boosting circuits 131, 132 connected respectively tohigh-frequency switches 121, 122 operate as follows: Since voltageboosting circuits 131, 132 operate in the same manner irrespective ofwhich one of the circuits shown in FIGS. 12 to 15 is employed, it isassumed that voltage boosting circuit 131 shown in FIG. 12 is employed.

The high-frequency signal detected at high-frequency detecting terminal212 of the high-frequency switch side is input to high-frequencydetecting terminal 206 of voltage boosting circuit 131. Thehigh-frequency signal is detected by diode 21, and a detected asymmetriccurrent flows in from diode 21. As a result, a potential higher than thepotential at input terminal 204 appears at output terminal 205 ofvoltage boosting circuit 131. Since the high-frequency signal detectedby the high-frequency switch is of the same magnitude as thehigh-frequency input signal when the high-frequency switch is in anON-state and is smaller than high-frequency input signal when thehigh-frequency switch is in an OFF-state, the difference between thecontrol potential input to the high-frequency switch in an ON-state andthe control potential input to the high-frequency switch in an OFF-stateincreases as the input amplitude of the high-frequency signal increases.Consequently, (V_(H)−V_(L)) in the equation (1) increases. Therefore,even if the control potentials input to control potential inputterminals 111, 112 are low, this high-frequency switch circuit can haveits handling power increased without having to increase the number ofFETs connected in cascade.

A second embodiment of the present invention will be described below.According to the first embodiment, the SPDT circuit has been described.However, the present invention is applicable to not only the SPDTcircuit, but also a circuit having a greater number of high-frequencyswitches or high-frequency switch circuit sections. FIG. 20 shows ahigh-frequency switch circuit according to the second embodiment of thepresent invention.

The high-frequency switch circuit shown in FIG. 20 is a DPDT(Double-Pole, Double-Throw) circuit and has two high-frequency terminals101, 104 for being supplied with high-frequency signals, twohigh-frequency terminals 102, 103 for outputting high-frequency signals,high-frequency switch 121 and potential dividing elements 141, 142connected between high-frequency terminals 101, 102, high-frequencyswitch 122 and potential dividing elements 143, 144 connected betweenhigh-frequency terminals 104, 102, high-frequency switch 123 andpotential dividing elements 145, 146 connected between high-frequencyterminals 101, 103, high-frequency switch 124 and potential dividingelements 147, 148 connected between high-frequency terminals 104, 103,voltage boosting circuits 131 to 134 connected respectively tohigh-frequency switches 121 to 124, and a pair of control potentialinput terminals 111, 112. Control potential input terminal 111 isconnected to voltage boosting circuits 131, 134, and control potentialinput terminal 112 is connected to voltage boosting circuits 132, 133.Potential dividing elements 141 to 148 may employ the arrangements shownin FIGS. 4 to 8. Voltage boosting circuits 131 to 134 may employ thearrangements shown in FIGS. 12 to 15.

This high-frequency switch circuit corresponds to a circuit whichemploys two SPDT circuits each shown in FIG. 3, which have respectivehigh-frequency terminals 102 connected in common and respectivehigh-frequency terminals 103 connected in common, and control potentialinput terminals 111, 112 connected in a crossing configuration. Sinceeach of the SPDT circuits operates in the same manner as with the firstembodiment, when a high-level control potential is applied to controlpotential input terminal 111 as a control signal and a low-level controlpotential is applied to control potential input terminal 112, ahigh-frequency signal input from high-frequency signal 101 is outputfrom high-frequency terminal 103, and a high-frequency signal input fromhigh-frequency signal 104 is output from high-frequency terminal 102.Inasmuch as an increased control potential is applied to ahigh-frequency switch that is in an ON-state, even when the controlpotentials input to control potential input terminals 111, 1112 are low,the high-frequency switch circuit can have its handling power increasedwithout having to increase the number of FETs connected in cascade.

A third embodiment of the present invention will be described below. Ahigh-frequency switch circuit according to the third embodiment shown inFIG. 21 is constructed as an SP3T (Single-Pole, Triple-Throw) circuit.This high-frequency switch circuit has high-frequency terminal 101 forbeing supplied with a high-frequency signal, three high-frequencyterminals 102 to 104 for outputting high-frequency signals,high-frequency switch 121 and potential dividing elements 141, 142connected between high-frequency terminals 101, 102, high-frequencyswitch 122 and potential dividing elements 143, 144 connected betweenhigh-frequency terminals 101, 103, high-frequency switch 123 andpotential dividing elements 145, 146 connected between high-frequencyterminals 101, 104, voltage boosting circuits 131 to 133 connectedrespectively to high-frequency switches 121 to 123, and controlpotential input terminals 111 to 113 connected respectively to voltageboosting circuits 131 to 133.

The high-frequency switch circuit is the same as the high-frequencyswitch circuit shown in FIG. 3, with third high-frequency switch 123,third voltage boosting circuit 133, and potential dividing elements 145,146 added thereto. The added circuit portion is identical to the circuitportion made up of first high-frequency switch 121, first voltageboosting circuit 131, and potential dividing elements 141, 142.Therefore, the added circuit portion operates in the same manner as thecircuit portion made up of first voltage boosting circuit 131 andpotential dividing elements 141, 142 in the high-frequency switchcircuit according to the first embodiment. With this high-frequencyswitch circuit, control signals are applied such that a high-levelcontrol signal is applied to either one of control potential inputterminals 111 to 113 and a low-level control signal is applied to theremaining two control potential input terminals. As a result, ahigh-frequency signal input to high-frequency terminal 101 is outputthrough the high-frequency switch corresponding to the control potentialinput terminal at the high level from the corresponding high-frequencyterminal. In this case, since an increased control potential is appliedto the high-frequency switch that is in an ON-state, even if the controlpotentials input to the control potential input terminals are low, thepresent high-frequency switch circuit can have its handling powerincreased without having to increase the number of FETs connected incascade.

While the present invention has been described as being applied to theDPDT circuit and the SP3T circuit, the present invention is alsoapplicable to a high-frequency switch circuit having a greater number ofhigh-frequency switches.

A fourth embodiment of the present invention will be described below. Inthe first to third embodiments described above, the potential dividingcircuit is provided for detecting a high-frequency signal from thehigh-frequency switch which is in an ON-state. High-frequency switchesmay be connected in cascade to detect a high-frequency signal thatpasses through the high-frequency switches which are in an ON-state,without the need for a potential dividing circuit. In this case, ahigh-frequency signal may be detected from the junction between thehigh-frequency switches.

FIG. 22 shows an example of the arrangement of such a high-frequencyswitch circuit. The switch circuit has high-frequency terminals 101 to103, high-frequency switches 121 to 124, voltage boosting circuits 131to 134, and control potential input terminals 111, 112. High-frequencyswitch 122 has an output terminal connected to high-frequency terminal102 and an input terminal connected to the output terminal ofhigh-frequency switch 121, the junction between high-frequency switches121, 122 serving as high-frequency detecting terminal 211.High-frequency switch 124 has an output terminal connected tohigh-frequency terminal 103 and an input terminal connected to theoutput terminal of high-frequency switch 123, the junction betweenhigh-frequency switches 123, 124 serving as high-frequency detectingterminal 212. The input terminals of high-frequency switches 121, 123are connected to high-frequency terminal 101. Voltage boosting circuit131 has an input terminal connected to control potential input terminal111 and an output terminal connected to the control terminals ofhigh-frequency switches 121, 122. Voltage boosting circuit 131 has ahigh-frequency detecting terminal connected to the output terminal ofhigh-frequency switch 121, i.e., high-frequency detecting terminal 211.Similarly, voltage boosting circuit 132 has an input terminal connectedto control potential input terminal 112 and an output terminal connectedto the control terminals of high-frequency switches 123, 124. Voltageboosting circuit 132 has a high-frequency detecting terminal connectedto the output terminal of high-frequency switch 123, i.e.,high-frequency detecting terminal 212.

Voltage boosting circuits 131, 132 may employ either one of thearrangements shown in FIGS. 12 to 15. High-frequency switches 121 to 124may employ the arrangement shown in FIG. 16 or 17. Of course, the numberof cascaded FETs in the high-frequency switches is not limited to thoseshown in FIGS. 16 and 17, i.e., two or four.

FIG. 23 shows a specific circuit arrangement of the high-frequencyswitch circuit according to the fourth embodiment. FETs 1, 2 connectedin cascade and resistive elements 61, 62 connected to the respectivegates of FETs 1, 2 make up high-frequency switch 121. Similarly, FETs 3,4 and resistive elements 63, 64 make up high-frequency switch 122. FETs5, 6 and resistive elements 65, 66 make up high-frequency switch 123,and FETs 7, 8 and resistive elements 67, 68 make up high-frequencyswitch 124. Voltage boosting circuits 131, 133 employ the arrangementshown in FIG. 13.

Operation of the high-frequency switch circuit according to the fourthembodiment will be described below.

Referring again to FIG. 22, control potentials having binary levels,i.e., high and low levels, are complementarily applied as controlsignals to control potential input terminals 111, 112. It is assumedthat a high-level potential is applied to control potential inputterminal 111 and a low-level potential is applied to control potentialinput terminal 112. When a high-frequency signal is input tohigh-frequency terminal 101 at this time, since high-frequency switches121, 122 are in an ON-state, the high-frequency signal is output tohigh-frequency terminal 102. Therefore, a signal having the sameamplitude as the high-frequency input signal can be detected athigh-frequency detecting terminal 211. On the contrary, sincehigh-frequency switches 123, 124 are in an OFF-state, no signal isoutput to high-frequency terminal 103. In an ordinary usage mode, as thehigh-frequency terminals are terminated, the amplitude of the signal athigh-frequency terminal 102 connected to high-frequency switch. 124 thatis in an OFF-state is considered to be substantially zero if a signalcomponent flowing in from the potential dividing circuit is ignored.Therefore, a signal having a reduced amplitude produced when thehigh-frequency input signal is divided at the ratio of the impedances ofthe high-frequency switches connected in cascade is detected athigh-frequency detecting terminal 212.

Voltage boosting circuits 131, 132 connected to high-frequency switches121 to 124 operate as follows: Since voltage boosting circuits 131, 132operate in the same manner irrespective of which one of the circuitsshown in FIGS. 12 to 15 is employed, it is assumed that voltage boostingcircuit 131 shown in FIG. 12 is employed.

The high-frequency signal detected at high-frequency detecting terminal212 of the high-frequency switch side is input to high-frequencydetecting terminal 206 of voltage boosting circuit 131. Thehigh-frequency signal is detected by diode 21, and a detected asymmetriccurrent flows in from diode 21. As a result, a potential higher than thepotential at input terminal 204 appears at output terminal 205 ofvoltage boosting circuit 131. Since the high-frequency signal detectedby the high-frequency switch side is of the same magnitude as thehigh-frequency input signal when the high-frequency switch is in anON-state and is smaller than the high-frequency input signal when thehigh-frequency switch is in an OFF-state, the difference between thecontrol potential input to the high-frequency switch in an ON-state andthe control potential input to the high-frequency switch in an OFF-stateincreases as the input amplitude of the high-frequency signal increases.Consequently, (V_(H)−V_(L)) in the equation (1) increases. Therefore,even if the control potentials input to control potential inputterminals 111, 112 are low, this high-frequency switch circuit can haveits handling power increased without having to increase the number ofFETs connected in cascade.

A fifth embodiment of the present invention will be described below. Inthe fourth embodiment, the junction between high-frequency switchesconnected in cascade is used as a detecting terminal. Input and outputterminals of a high-frequency switch may also be used as a detectingterminal for the same advantages.

FIG. 24 shows an example of the arrangement of such a high-frequencyswitch circuit. The switch circuit has high-frequency terminals 101 to103, high-frequency switches 121, 123, voltage boosting circuits 131,132, and control potential input terminals 111, 112. High-frequencyswitch 121 has an output terminal connected to high-frequency terminal102 and serving as high-frequency detecting terminal 211. High-frequencyswitch 123 has an output terminal connected to high-frequency terminal103 and serving as high-frequency detecting terminal 212. High-frequencyswitches 121, 123 have respective input terminals connected tohigh-frequency terminal 101. Voltage boosting circuit 131 has an inputterminal connected to control potential input terminal 111 and an outputterminal connected to the control terminal of high-frequency switch 121.Voltage boosting circuit 131 has a high-frequency detecting terminalconnected to the output terminal of high-frequency switch 121, i.e.,high-frequency detecting terminal 211. Similarly, voltage boostingcircuit 132 has an input terminal connected to control potential inputterminal 112 and an output terminal connected to the control terminal ofhigh-frequency switch 123. Voltage boosting circuit 132 has ahigh-frequency detecting terminal connected to the output terminal ofhigh-frequency switch 123, i.e., high-frequency detecting terminal 212.

Voltage boosting circuits 131, 132 may employ either one of thearrangements shown in FIGS. 12 to 15. High-frequency switches 121 to 124may employ the arrangement shown in FIG. 16 or 17. Of course, the numberof cascaded FETs in the high-frequency switches is not limited to thoseshown in FIGS. 16 and 17.

FIGS. 25 and 26 show specific circuit arrangements of the high-frequencyswitch circuit according to the fifth embodiment. The high-frequencyswitch circuit shown in FIG. 25 is equivalent to the high-frequencyswitch circuit shown in FIG. 23 except that the high-frequency detectingterminals of voltage boosting circuits 131, 132 are connectedrespectively to high-frequency terminals 102, 103. The high-frequencyswitch circuit shown in FIG. 26 is similar to the high-frequency switchcircuit shown in FIG. 25 except that resistive element 58 is insertedbetween capacitive element 43 and the high-frequency detecting terminalof each of voltage boosting circuits 131, 132.

Operation of the high-frequency switch circuit according to the fifthembodiment will be described below.

Referring again to FIG. 24, control potentials having binary levels,i.e., high and low levels, are complementarily applied as controlsignals to control potential input terminals 111, 112. It is assumedthat a high-level potential is applied to control potential inputterminal 111 and a low-level potential is applied to control potentialinput terminal 112. When a high-frequency signal is input tohigh-frequency terminal 101 at this time, since high-frequency switch121 is in an ON-state, the high-frequency signal is output tohigh-frequency terminal 102. Therefore, a signal having the sameamplitude as the high-frequency input signal can be detected athigh-frequency detecting terminal 211. Since high-frequency switch 123is in an OFF-state, no signal is output to high-frequency terminal 103.As with the above embodiments, the amplitude of the signal athigh-frequency terminal 102 connected to high-frequency switch 123 thatis in an OFF-state is considered to be substantially zero, and theamplitude of the signal detected at high-frequency detecting terminal212 is almost zero.

Voltage boosting circuits 131, 132 connected to high-frequency switches121, 124 operate as follows: Since voltage boosting circuits 131, 132operate in the same manner irrespective of which one of the circuitsshown in FIGS. 12 to 15 is employed, it is assumed that voltage boostingcircuit 131 shown in FIG. 12 is employed.

The high-frequency signal detected at high-frequency detecting terminal212 of the high-frequency switch side is input to high-frequencydetecting terminal 206 of voltage boosting circuit 131. Thehigh-frequency signal is detected by diode 21, and a detected asymmetriccurrent flows in from diode 21. As a result, a potential higher than thepotential at input terminal 204 appears at output terminal 205 ofvoltage boosting circuit 131. Since the high-frequency signal detectedby the high-frequency switch side is of the same magnitude as thehigh-frequency input signal when the high-frequency switch is in anON-state and is substantially zero in amplitude when the high-frequencyswitch is in an OFF-state, the difference between the control potentialinput to the high-frequency switch in an ON-state and the controlpotential input to the high-frequency switch in an OFF-state increasesas the input amplitude of the high-frequency signal increases.Consequently, (V_(H)−V_(L)) in the equation (1) increases. Therefore,even if the control potentials input to control potential inputterminals 111, 112 are low, this high-frequency switch circuit can haveits handling power increased without having to increase the number ofFETs connected in cascade.

A sixth embodiment of the present invention will be described below. Inthe second to fifth embodiments described above, the voltage boostingcircuits are connected to all the high-frequency switches of thehigh-frequency switch circuit. According to the sixth embodiment, avoltage boosting circuit is connected to only certain high-frequencyswitches. This arrangement is effective in a high-frequency switchapplication where a high-amplitude signal is input to only a certainhigh-frequency terminal and a low-amplitude signal is input to anotherhigh-frequency terminal. In this case, the handling power ofhigh-frequency switches through which the high-amplitude signal passesmay be increased.

FIG. 27 shows an example of the arrangement of such a high-frequencyswitch circuit. The switch circuit has high-frequency terminals 101 to103, high-frequency switches 121 to 123, voltage boosting circuit 131,and control potential input terminals 111, 112. High-frequency switches121, 122 are connected in cascade. High-frequency switch 122 has anoutput terminal connected to high-frequency terminal 102, andhigh-frequency switch 123 has an output terminal connected tohigh-frequency terminal 103. High-frequency switches 121, 123 haverespective input terminals connected to high-frequency terminal 101which serves as high-frequency detecting terminal 211. Voltage boostingcircuit 131 has an input terminal connected to control potential inputterminal 111 and a high-frequency detecting terminal connected to theinput terminal of high-frequency switch 121, i.e., high-frequencydetecting terminal 211.

Voltage boosting circuits 131, 132 may employ either one of thearrangements shown in FIGS. 12 to 15. High-frequency switches 121 to 123may employ the arrangement shown in FIG. 16 or 17. Of course, the numberof cascaded FETs in the high-frequency switches is not limited to thoseshown in FIGS. 16 and 17.

Operation of the sixth embodiment will be described below. Thehigh-frequency switch circuit according to the sixth embodiment operatesin the same principles as with the first embodiment described above.Only different operational features will be described below.

The high-frequency switch circuit according to the sixth embodiment isarranged such that a high-amplitude signal is input from only a certainhigh-frequency terminal, and the handling power of high-frequencyswitches through which the high-amplitude signal passes is increased. Itis assumed that a high-amplitude signal is input to only high-frequencyterminal 102, and high-frequency switches 121, 122 are turned on.Voltage boosting circuit 131 is connected to high-frequency switches121, 122, and no voltage boosting circuit is connected to high-frequencyswitch 123. The amplitude of a signal at high-frequency detectingterminal 211 is essentially the same as the amplitude of a signal inputto high-frequency terminal 102. Inasmuch as the voltage boosting circuitoperates in the principles described above with respect to the firstembodiment, a potential increased depending on the input amplitude ofthe high-frequency signal is applied to the control terminals ofhigh-frequency switches 121, 122, and a potential applied to the controlterminal of high-frequency switch 123 is not increased. Therefore, thedifference between the control potential input to the high-frequencyswitch in an ON-state and the control potential input to thehigh-frequency switch in an OFF-state increases as the input amplitudeof the high-frequency signal increases. Consequently, (V_(H)−V_(L)) inthe equation (1) increases. Therefore, even if the control potentialsinput to control potential input terminals 111, 112 are low, thishigh-frequency switch circuit can have its handling power increasedwithout having to increase the number of FETs connected in cascade.

FIG. 28 shows a specific circuit arrangement of the high-frequencyswitch circuit according to the sixth embodiment. FETs 1, 2 connected incascade and resistive elements 61, 62 connected to the respective gatesof FETs 1, 2 make up high-frequency switch 121. Similarly, FETs 3, 4 andresistive elements 63, 64 make up high-frequency switch 122. FETs 5 to 8and resistive elements 65 to 68 make up high-frequency switch 123.Voltage boosting circuit 131 employs the arrangement shown in FIG. 13.

In the above embodiment, the SPDT arrangement has basically beendescribed. However, the circuit according to the present invention isnot limited to the SPDT switch, but is also applicable to an SPnT ormultiple-input, multiple-output switch. While the input terminal of ahigh-frequency switch is used as the high-frequency detecting terminalin the above embodiment, the cascade connection terminal ofhigh-frequency switches or the output terminal of a high-frequencyswitch may be used as a high-frequency detecting terminal for the sameadvantages.

A seventh embodiment of the present invention will be described below.In the sixth embodiment described above, the control potential for thehigh-frequency switch to be turned on is increased by the voltageboosting circuit. In the seventh embodiment, in view of a high-amplitudesignal input to a certain high-frequency terminal as with the sixthembodiment, a voltage lowering circuit is provided for lowering acontrol potential applied to high-frequency switches to be turned off inorder to increase the handling power of certain high-frequency switches.

FIG. 29 shows an example of the arrangement of such a high-frequencyswitch circuit. The switch circuit has high-frequency terminals 101 to103, high-frequency switches 121 to 124, a voltage lowering circuit 161,and control potential input terminals 111, 112. High-frequency switches123, 124 are connected in cascade, and high frequency switches 121, 122are connected in cascade. Cascaded high-frequency switch 122 has anoutput terminal connected to high-frequency terminal 102, and cascadedhigh-frequency switch 124 has an output terminal connected tohigh-frequency terminal 103. High-frequency switches 121, 123 haverespective input terminals connected to high-frequency terminal 101which serves as high-frequency detecting terminal 211. Voltage loweringcircuit 161 has an input terminal connected to control potential inputterminal 112 and a high-frequency detecting terminal connected to theinput terminal of high-frequency switch 123, i.e., high-frequencydetecting terminal 211.

Voltage lowering circuit 161 will be described below. The voltagelowering circuit may be a voltage boosting circuit described above wherethe polarity of the diode element is reversed.

FIG. 30 shows an example of the arrangement of voltage lowering circuit161. Voltage lowering circuit 161 has input terminal 304 and outputterminal 305 between which a resistive element 54 is connected, anddiode 22 element is connected to resistive element 54 in parallel. Diodeelement 224 has an anode connected to output terminal 305 and a cathodeconnected to input terminal 304. Further, capacitive element 43 isconnected between high-frequency detecting terminal 306 and outputterminal 305 of voltage lowering circuit 161. As shown in FIG. 31,resistive element 55 may be inserted between input terminal 304 and thecathode of diode element 22. As shown in FIG. 32, resistive element 56may be inserted between output terminal 305 and the anode of diodeelement 22. The voltage lowering circuits shown in FIGS. 30 to 32 areequivalent to the voltage boosting circuits shown in FIGS. 12 to 14,respectively, where the polarity of the diode element is reversed.

In the present embodiment, voltage lowering circuit 161 may employeither one of the arrangements shown in FIGS. 30 to 32. High-frequencyswitches 121 to 124 may employ the arrangement shown in FIG. 16 or 17.Of course, the number of cascaded FETs in the high-frequency switches isnot limited to those shown in FIGS. 16 and 17.

Operation of the seventh embodiment will be described below.

FIG. 29 will be referred to again. According to the seventh embodiment,a high-amplitude signal is input from only a certain high-frequencyterminal, and it is an object of the seventh embodiment to increase thehandling power of high-frequency switches through which thehigh-amplitude signal passes. It is assumed that a high-amplitude signalis input to only high-frequency terminal 102, and high-frequencyswitches 121, 122 are turned on. Neither voltage boosting circuit norvoltage lowering circuit is connected to high-frequency switches 121,122, and voltage lowering circuit 161 is connected to high-frequencyswitches 123, 124. Therefore, the amplitude of a signal athigh-frequency detecting terminal 211 is essentially the same as theamplitude of a signal input to high-frequency terminal 102.

Inasmuch as voltage lowering circuit 161 operates in the same mannerirrespective of which one of the circuits shown in FIGS. 30 to 32 isemployed, it is assumed that voltage lower circuit 161 shown in FIG. 30is employed.

The high-frequency signal detected at high-frequency detecting terminal211 of the high-frequency switch side is input to high-frequencydetecting terminal 306 of voltage lowering circuit 161. Thehigh-frequency signal is detected by diode 22, and a detected asymmetriccurrent flows in from diode 21. As a result, a potential lower than thepotential at input terminal 304 appears at lowered potential terminal307 of voltage lowering circuit 161.

Therefore, the potential at the control terminals of high-frequencyswitches 123, 124 is lowered from the potential at control potentialinput terminal 112 by voltage lowering circuit 161. Since the potentialat the control terminals of high-frequency switches 121, 122 remainsunchanged, it is the same as the potential at control potential inputterminal 111. Consequently, the difference between the control potentialinput to the high-frequency switch in an ON-state and the controlpotential input to the high-frequency switch in an OFF-state increasesas the input amplitude of the high-frequency signal increases.Consequently, (V_(H)−V_(L)) in the equation (1) increases. Therefore,even if the control potentials input to control potential inputterminals 111, 112 are low, the present high-frequency switch circuitcan have its handling power increased, without having to increase thenumber of FETs connected in cascade.

FIG. 33 shows a specific circuit arrangement of the high-frequencyswitch circuit according to the sixth embodiment. FETs 1, 2 connected incascade and resistive elements 61, 62 connected to the respective gatesof FETs 1, 2 make up high-frequency switch 121. Similarly, FETs 3, 4 andresistive elements 63, 64 make up high-frequency switch 122. FETs 5, 6and resistive elements 65, 66 make up high-frequency switch 123, andFETs 7, 8 and resistive elements 67, 68 make up high-frequency switch124. Voltage lowering circuit 161 employs the arrangement shown in FIG.31.

In the above embodiment, the SPDT arrangement has basically beendescribed. However, the circuit according to the present invention isnot limited to the SPDT switch, but is also applicable to an SPnT ormultiple-input, multiple-output switch. While the input terminal of ahigh-frequency switch is used as the high-frequency detecting terminalin the above embodiment, the cascade connection terminal ofhigh-frequency switches or the output terminal of a high-frequencyswitch may be used as a high-frequency detecting terminal for the sameadvantages.

An eighth embodiment of the present invention will be described below.In the seventh embodiment described above, a high-frequency terminal towhich a high-amplitude signal is input is a particular terminal. Ahigh-frequency switch circuit according to the eighth embodiment is ofan arrangement capable of lowering a potential at a high-frequencyswitch in an OFF-state for achieving high handling power irrespective ofwhich high-frequency terminal is supplied with a high-amplitude signal.Specifically, the high-frequency switch circuit according to the eighthembodiment has voltage boosting circuits and voltage lowering circuitsas described above, and potential combining circuits for combiningpotentials from the voltage increasing and lowering circuits andoutputting the combined potentials.

FIG. 34 shows an example of the arrangement of such a high-frequencyswitch circuit. The switch circuit has high-frequency terminals 101 to103, high-frequency switches 121 to 124, voltage boosting circuits 131,132, voltage lowering circuits 161, 162, control potential inputterminals 111, 112, and potential combining circuits 171, 172.High-frequency switch 122 has an output terminal connected tohigh-frequency terminal 102 which serves as detecting terminal 212, andan input terminal connected to the output terminal of high-frequencyswitch 121. High-frequency switch 124 has an output terminal connectedto high-frequency terminal 103 which serves as high-frequency detectingterminal 214, and an input terminal connected to the output terminal ofhigh-frequency switch 123. High-frequency switches 121, 123 haverespective input terminals connected to high-frequency terminal 101which serves as high-frequency detecting terminals 211, 213.

Voltage boosting circuit 131 and voltage lowering circuit 161 haverespective input terminals connected to control potential input terminal111. Voltage boosting circuit 131 has an output terminal connected to afirst input terminal of potential combining circuit 171, and voltagelowering circuit 161 has an output terminal connected to a second inputterminal of potential combining circuit 171. The output terminal of thepotential combining circuit is connected to the control terminals ofhigh-frequency switches 121, 122. Voltage boosting circuit 131 has ahigh-frequency detecting terminal connected to the output terminal ofhigh-frequency switch 122, i.e., detecting terminal 212. Voltagelowering circuit 161 has a high-frequency detecting terminal connectedto the input terminal of high-frequency switch 121, i.e., detectingterminal 211.

Further, voltage boosting circuit 132 and voltage lowering circuit 162have respective input terminals connected to control potential inputterminal 112. Voltage boosting circuit 132 has an output terminalconnected to a first input terminal of potential combining circuit 172,and voltage lowering circuit 162 has an output terminal connected to asecond input terminal of potential combining circuit 172. The outputterminal of the potential combing circuit is connected to the controlterminals of high-frequency switches 123, 124. Voltage boosting circuit132 has a high-frequency detecting terminal connected to the outputterminal of high-frequency switch 124, i.e., detecting terminal 214.Voltage lowering circuit 162 has a high-frequency detecting terminalconnected to the input terminal of high-frequency switch 123, i.e.,detecting terminal 213.

Voltage boosting circuits 131, 132 may employ either one of thearrangements shown in FIGS. 12 to 15. Voltage lowering circuits 161, 162may employ either one of the arrangements shown in FIGS. 30 to 32.High-frequency switches 121 to 124 may employ the arrangement shown inFIG. 16 or 17. Of course, the number of cascaded FETs in thehigh-frequency switches is not limited to those shown in FIGS. 16 and17.

FIG. 35 shows another example of the arrangement of the high-frequencyswitch circuit according to the sixth embodiment. The high-frequencyswitch circuit has high-frequency terminals 101 to 103, high-frequencyswitches 121 to 124, voltage boosting circuits 131, 132, voltagelowering circuits 161,162, control potential input terminals 111, 112,and potential combining circuits 171, 172. High-frequency switch 122 hasan output terminal connected to high-frequency terminal 102 which servesas high-frequency detecting terminal 212, and an input terminalconnected to the output terminal of high-frequency switch 121, thejunction between high-frequency switches 121, 122 serving ashigh-frequency detecting terminal 211. High-frequency switch 124 has anoutput terminal connected to high-frequency terminal 103 which serves asdetecting terminal 214, and an input terminal connected to the outputterminal of high-frequency switch 123, the junction betweenhigh-frequency switches 123, 124 serving as high-frequency detectingterminal 213. High-frequency switches 121, 123 have respective inputterminals connected to high-frequency terminal 101.

Voltage boosting circuit 131 and voltage lowering circuit 161 haverespective input terminals connected to control potential input terminal111. Voltage boosting circuit 131 has an output terminal connected to afirst input terminal of potential combining circuit 171, and voltagelowering circuit 161 has an output terminal connected to a second inputterminal of potential combining circuit 171. The output terminal of thepotential combining circuit is connected to the control terminals ofhigh-frequency switches 121, 122. Voltage boosting circuit 131 has ahigh-frequency detecting terminal connected to the output terminal ofhigh-frequency switch 122, i.e., detecting terminal 212. Voltagelowering circuit 161 has a high-frequency detecting terminal connectedto detecting terminal 211.

Voltage boosting circuit 132 and voltage lowering circuit 162 haverespective input terminals connected to control potential input terminal112. Voltage boosting circuit 132 has an output terminal connected to afirst input terminal of potential combining circuit 172, and voltagelowering circuit 162 has an output terminal connected to a second inputterminal of potential combining circuit 172. The output terminal of thepotential combining circuit is connected to the control terminals ofhigh-frequency switches 123, 124. Voltage boosting circuit 132 has ahigh-frequency detecting terminal connected to the output terminal ofhigh-frequency switch 124, ie., detecting terminal 214. Voltage loweringcircuit 162 has a high-frequency detecting terminal connected todetecting terminal 213.

Voltage boosting circuits 131, 132 may employ either one of thearrangements shown in FIGS. 12 to 15. Voltage lowering circuits 161, 162may employ either one of the arrangements shown in FIGS. 30 to 32.High-frequency switches 121 to 124 may employ the arrangement shown inFIG. 16 or 17. Of course, the number of cascaded FETs in thehigh-frequency switches is not limited to those shown in FIGS. 16 and17.

Potential combining circuits 171, 172 according to the presentembodiment will be described below. Since potential combining circuits171, 172 are usually identical in circuit arrangement, potentialcombining circuit 171 will be described below.

FIG. 36 shows an example of the arrangement of potential combiningcircuit 171. Potential combining circuit 171 has first and second inputterminals 310, 311 and output terminal 312, resistive element 59connected between first input terminal 310 and output terminal 312, andresistive element 60 connected between second input terminal 311 andoutput terminal 312. Potential combining circuit 171 is not limited tothe arrangement shown in FIG. 36 insofar as the potential between thepotential at first input terminal 310 and the potential at second inputterminal 311 is output to output terminal 312.

In the above circuit, the high-frequency detecting terminal of a voltagelowering circuit is connected to the junction between high-frequencyswitches. According to the present embodiment, unless the high-frequencydetecting terminal of a voltage lowering circuit and the high-frequencydetecting terminal of a voltage boosting circuit associated with certainhigh-frequency switches are connected to one point, a difference isdeveloped between input signals applied to the voltage boosting circuitand the voltage lowering circuit, making it possible to change anincrease or decrease amount in the potentials at the control terminalsby on-and-off operation of the switch elements. Unless being connectedto one point, the high-frequency detecting terminals of the voltageboosting circuit and the voltage lowering circuit may be connected tothe junctions between the high-frequency switches or the input andoutput terminals of the switch means, and are not limited to theillustrated arrangement.

Operation of the high-frequency switch circuit according to the sixthembodiment will be described below.

Referring again to FIG. 34, control potentials having binary levels,i.e., high and low levels, are complementarily applied as controlsignals to control potential input terminals 111, 112. It is assumedthat a high-level potential is applied to control potential inputterminal 111 and a low-level potential is applied to control potentialinput terminal 112. When a high-frequency signal is input tohigh-frequency terminal 0.101 at this time, since high-frequencyswitches 121, 122 are in an ON-state, the signal is output tohigh-frequency terminal 102. Therefore, a signal having the sameamplitude as the high-frequency input signal can be detected athigh-frequency detecting terminals 211, 212. On the other hand, sincehigh-frequency switches 123, 124 are in an OFF-state, no signal isoutput to high-frequency terminal 103. In an ordinary usage mode, ashigh-frequency terminals 101 to 103 are terminated, the amplitude of thesignal at high-frequency terminal 102 connected to high-frequencyswitches 123, 124 that is in an OFF-state is considered to be atsubstantially ground potential. Therefore, a signal having the sameamplitude as the input signal is detected at high-frequency detectingterminal 213, and no signal is detected at high-frequency detectingterminal 214.

Voltage lowering circuit 161 and voltage boosting circuit 131 that areconnected respectively to high-frequency detecting terminals 211, 212operate as follows: Since voltage boosting circuits 131, 132 operate inthe same manner irrespective of which one of the circuits shown in FIGS.12 to 15 is employed, it is assumed that voltage boosting circuit 131shown in FIG. 12 is employed. Since voltage lowering circuits 161, 162operate in the same manner irrespective of which one of the circuitsshown in FIGS. 30 to 32 is employed, it is assumed that voltage loweringcircuit 161 shown in FIG. 30 is employed.

The high-frequency signal detected at high-frequency detecting terminal212 of the high-frequency switch side is input to high-frequencydetecting terminal 206 of voltage boosting circuit 131. Thishigh-frequency signal is detected by diode 21, and a detected asymmetriccurrent flows in from diode 21; As a result, a potential higher than thepotential at input terminal 204 appears at increased voltage outputterminal 205 of voltage boosting circuit 131. Furthermore, thehigh-frequency signal detected at high-frequency detecting terminal 211of the high-frequency switch side is input to high-frequency detectingterminal 306 of voltage lowering circuit 161. This high-frequency signalis detected by diode 21, and a detected asymmetric current flows outfrom diode 21. As a result, a potential lower than the potential atinput terminal 304 appears at decreased voltage output terminal 305 ofvoltage lowering circuit 161.

The potential combining circuit averages the output potentials ofvoltage boosting circuit 131 and voltage lowering circuit 161. Thehigh-frequency signals detected respectively at high-frequency detectingterminals 211, 212 are of substantially the same amplitude whenhigh-frequency switches 121, 122 are in an ON-state. Therefore, anincrease caused in the potential by the voltage boosting circuit and areduction caused in the potential by the voltage lowering circuit are ofsubstantially the same value, and the potentials applied to the controlterminals of high-frequency switches 121, 122 are essentially the sameas the high-level potential applied to control potential input terminal111.

Control potentials applied to high-frequency witches 123, 124 aredetermined in the same manner as the control potentials applied tohigh-frequency witches 121, 122. However, since the amplitude of thesignal at high-frequency detecting terminal 213 of voltage loweringcircuit 162 is equal to the amplitude of the input signal, and theamplitude of the signal at high-frequency detecting terminal 214 ofvoltage boosting circuit 132 is substantially zero, the voltage loweringcircuit reduces the potential, but the voltage boosting circuit does notincrease the potential. As a result, the output of the potentialcombining circuit becomes lower than the low-level potential applied tocontrol potential input terminal 112.

As a consequence, the difference between the control potential input tohigh-frequency switches 121, 122 in an ON-state and the controlpotential input to high-frequency switches 123, 124 in an OFF-stateincreases as the input amplitude of the high-frequency signal increases.Consequently, (V_(H)−V_(L)) in the equation (1) increases. Therefore,even if the control potentials input to control potential inputterminals 111, 112 are low, this high-frequency switch circuit can haveits handling power increased without having to increase the number ofFETs connected in cascade.

FIGS. 37 and 38 show specific circuit arrangements of the high-frequencyswitch circuit according to the sixth embodiment. In these circuits,FETs 1, 2 connected in cascade and resistive elements 61, 62 connectedto the respective gates of FETs 1, 2 make up high-frequency switch 121.Similarly, FETs 3, 4 and resistive elements 63, 64 make uphigh-frequency switch 122. FETs 5, 6 and resistive elements 65, 66 makeup high-frequency switch 123, and FETs 7, 8 and resistive elements 67,68 make up high-frequency switch 124.

In the circuit shown in FIG. 37, each of voltage boosting circuits 131,132 has resistive element 69 having one end connected to an inputterminal and the other end connected to the anode of diode element 23,an output terminal connected to the cathode of diode element 23, andcapacitive element 44 connected between the output terminal and ahigh-frequency detecting terminal. Voltage lowering circuits 161, 162are equivalent to voltage boosting circuits 131, 132, respectively,where the polarity of diode elements 23 is reversed. In the circuitshown in FIG. 37, resistor 173 is inserted between control potentialinput terminal 111 and the output terminal of potential combiningcircuit 171, and similarly resistor 174 is inserted between controlpotential input terminal 112 and the output terminal of potentialcombining circuit 172.

In the circuit shown in FIG. 38, each of the voltage boosting circuitsemploys the arrangement shown in FIG. 13 and each of the voltagelowering circuits employs the arrangement shown in FIG. 31.

In the above embodiment, the SPDT arrangement has basically beendescribed. However, the circuit according to the present invention isnot limited to the SPDT switch, but is also applicable to an SPnT ormultiple-input, multiple-output switch. The voltage boosting circuitsand the voltage lowering circuits in the above high-frequency switchcircuit are identical in circuit arrangement except that the polarity ofthe diode element is reversed, and this arrangement offers the aboveadvantages. However, in the high-frequency switch circuit, the circuitarrangements of the voltage boosting circuits and the voltage loweringcircuits and the element values making up these circuits do not need tobe identical. If a circuit arrangement is employed for making anincrease caused in the potential by the voltage boosting circuitsgreater than a reduction caused in the potential by the voltage loweringcircuits, then it is possible to increase the potential at the controlterminal of the high-frequency switch in an ON-state and lower thepotential at the control terminal of the high-frequency switch in anOFF-state. In this case, too, the handling power is increased.

A ninth embodiment of the present invention will be described below. Inview of a high-amplitude signal input to a certain high-frequencyterminal as with the sixth embodiment, the control potential forhigh-frequency switches to be turned off is lowered in order to increasethe handling power of certain high-frequency switches.

FIG. 39 shows an example of the arrangement of such a high-frequencyswitch circuit. The high-frequency switch circuit has high-frequencyterminals 101 to 103, high-frequency switches 121 to 124, voltageboosting circuit 132, voltage lowering circuit 162, control potentialinput terminals 111, 112, and potential combining circuit 172.High-frequency switch 122 has an output terminal connected tohigh-frequency terminal 102 and an input terminal connected to theoutput terminal of high-frequency switch 121. High-frequency switch 124has an output terminal connected to high-frequency terminal 103 whichserves as high-frequency detecting terminal 212, and an input terminalconnected to the output terminal of high-frequency switch 123. The inputterminals of high-frequency switches 121, 123 are connected tohigh-frequency terminal 101 which serves as high-frequency detectingterminal 211.

Voltage boosting circuit 132 and voltage lowering circuit 162 haverespective input terminals connected to control potential input terminal112. Voltage boosting circuit 132 has an output terminal connected to afirst input terminal of potential combining circuit 172, and voltagelowering circuit 162 has an output terminal connected to a second inputterminal of potential combining circuit 172. The output terminal of thepotential combining circuit is connected to the control terminals ofhigh-frequency switches 123, 124. Voltage boosting circuit 132 has ahigh-frequency detecting terminal connected to the output terminal ofhigh-frequency switch 124, i.e., high-frequency detecting terminal 212.Voltage lowering circuit 162 has a high-frequency detecting terminalconnected to the input terminal of high-frequency switch 123, i.e.,high-frequency detecting terminal 211.

Voltage boosting circuit 132 may employ either one of the arrangementsshown in FIGS. 12 to 15. Voltage lowering circuit 162 may employ eitherone of the arrangements shown in FIGS. 30 to 32. High-frequency switches121 to 124 may employ the arrangement shown in FIG. 16 or 17. Of course,the number of cascaded FETs in the high-frequency switches is notlimited to those shown in FIGS. 16 and 17. Potential combining circuit172 may employ the arrangement shown in FIG. 36. Potential combiningcircuit 172 is not limited to the arrangement shown in FIG. 36 insofaras the potential between the potential at the first input terminal andthe potential at the second input terminal is output to the outputterminal.

Operation of the high-frequency switch circuit according to the ninthembodiment will be described below.

The high-frequency switch circuit according to the ninth embodiment isarranged such that a high-amplitude signal is input from only a certainhigh-frequency terminal, and the handling power of high-frequencyswitches through which the high-amplitude signal passes is increased. Itis assumed that a high-amplitude signal is input to only high-frequencyterminal 102, and high-frequency switches 121, 122 are turned on.Inasmuch as a circuit portion made up of high-frequency switches 123,124, voltage boosting circuit 132, and voltage lowering circuit 162operates in the principles described above with respect to the eighthembodiment, the potential at the control terminals of high-frequencyswitches 123, 124 is lowered from the potential at control potentialinput terminal 112 by a value corresponding to the amplitude of thesignal. Since the potential at the control terminals of high-frequencyswitches 121, 122 remains unchanged, it is the same as the potential atcontrol potential input terminal 111. Consequently, the differencebetween the control potential input to the high-frequency switch in anON-state and the control potential input to the high-frequency switch inan OFF-state increases as the input amplitude of the high-frequencysignal increases. Consequently, (V_(H)−V_(L)) in the equation (1)increases. Therefore, even if the control potentials input to controlpotential input terminals 111, 112 are low, this high-frequency switchcircuit can have its handling power increased without having to increasethe number of FETs connected in cascade.

FIG. 40 shows a specific circuit arrangement of the high-frequencyswitch circuit according to the ninth embodiment. FETs 1, 2 connected incascade and resistive elements 61, 62 connected to the respective gatesof FETs 1, 2 make up high-frequency switch 121. Similarly, FETs 3, 4 andresistive elements 63, 64 make up high-frequency switch 122. FETs 5, 6and resistive elements 65, 66 make up high-frequency switch 123, andFETs 7, 8 and resistive elements 67, 68 make up high-frequency switch124. The voltage boosting circuit and the voltage lowering circuitemploy those in the high-frequency switch circuit shown in FIG. 37.Potential combining circuit 172 employs the arrangement shown in FIG.36. Resistor 174 is inserted between control potential input terminal112 and the output terminal of potential combining circuit 172.

In the above embodiment, the SPDT arrangement has basically beendescribed. However, the circuit according to the present invention isnot limited to the SPDT switch, but is also applicable to an SPnT ormultiple-input, multiple-output switch. While the high-frequencydetecting terminals are the input and output terminals of thehigh-frequency switches in the above embodiment, the cascade connectionterminal of high-frequency switches or the output terminal of ahigh-frequency switch may be used as a high-frequency detecting terminalfor the same advantages.

A tenth embodiment of the present invention will be described below. Inthe eighth and ninth embodiments described above, the high-frequencydetecting terminals of the voltage boosting circuit and the voltagelowering circuit are the input and output terminals of thehigh-frequency switches or the junction terminal between cascadedswitches. According to the tenth embodiment, potential dividing elementsare connected in cascade between any two points of the input and outputterminals of high-frequency switches and the junction terminal betweencascaded switches as with the case of the first embodiment, and thejunctions between the cascaded potential dividing elements are used ashigh-frequency detecting terminals.

FIG. 41 shows an example of the arrangement of such a high-frequencyswitch circuit. The high-frequency switch circuit has high-frequencyterminals 101 to 103, high-frequency switches 121 to 124, voltageboosting circuits 131, 132, voltage lowering circuits 161, 162, controlpotential input terminals 111, 112, and potential combining circuits171, 172. High-frequency switch 122 has an output terminal connected tohigh-frequency terminal 102, high-frequency switch 121 has an outputterminal connected to the input terminal of high-frequency terminal 122,high-frequency switch 124 has an output terminal connected tohigh-frequency terminal 103, and high-frequency switch 123 has an outputterminal connected to the input terminal of high-frequency switch 124.High-frequency switches 121, 123 have respective input terminalsconnected to high-frequency terminal 101. Cascaded potential dividingelements 141 to 143 are connected between high-frequency terminals 101,102, and the two junctions between cascaded potential dividing elements141 to 143 serve as high-frequency detecting terminals 211, 212.Cascaded potential dividing elements 144 to 146 are connected betweenhigh-frequency terminals 101, 103, and the two junctions betweencascaded potential dividing elements 144 to 146 serve as high-frequencydetecting terminals 213, 214.

Voltage boosting circuit 131 and voltage lowering circuit 161 haverespective input terminals connected to control potential input terminal111. Voltage boosting circuit 131 has an output terminal connected to afirst input terminal of potential combining circuit 171, and voltagelowering circuit 161 has an output terminal connected to a second inputterminal of potential combining circuit 171. The output terminal of thepotential combining circuit is connected to the control terminals ofhigh-frequency switches 121, 122. Voltage boosting circuit 131 has ahigh-frequency detecting terminal connected to high-frequency detectingterminal 212. Voltage lowering circuit 161 has a high-frequencydetecting terminal connected to high-frequency detecting terminal 211.Voltage boosting circuit 132 and voltage lowering circuit 162 haverespective input terminals connected to control potential input terminal112. Voltage boosting circuit 132 has an output terminal connected to afirst input terminal of potential combining circuit 172, and voltagelowering circuit 162 has an output terminal connected to a second inputterminal of potential combining circuit 172. The output terminal of thepotential combining circuit is connected to the control terminals ofhigh-frequency switches 123, 124. Voltage boosting circuit 132 has ahigh-frequency detecting terminal connected to high-frequency detectingterminal 214. Voltage lowering circuit 162 has a high-frequencydetecting terminal connected to high-frequency detecting terminal 213.

Voltage boosting circuits 131, 132 may employ either one of thearrangements shown in FIGS. 12 to 15. Voltage lowering circuits 161, 162may employ either one of the arrangements shown in FIGS. 30 to 32.High-frequency switches 121 to 124 may employ the arrangement shown inFIG. 16 or 17. The number of cascaded FETs in the high-frequencyswitches is not limited to those shown in FIGS. 16 and 17. Potentialcombining circuits 171, 172 may employ arrangements other than thearrangement shown in FIG. 36 insofar as the potential between thepotential at the first input terminal and: the potential at the secondinput terminal is output to the output terminal. Potential dividingelements 141 to 146 may be any of resistive elements, capacitiveelements, and inductive elements. Resistive elements, capacitiveelements, and inductive elements may be connected either in series orparallel to each other as Potential dividing elements 141 to 146.

Operation of the high-frequency switch circuit according to the tenthembodiment will be described below. Operation of the tenth embodiment isdescribed by way of the inputting of signals from the detectingterminals described above in the first embodiment and the operation ofthe voltage boosting circuits and the voltage lowering circuitsdescribed above in the eighth embodiment.

FIG. 41 will be referred to again. It is assumed that a high-levelpotential is input to control potential input terminal 111 and alow-level potential is input to control potential input terminal 112.When a high-frequency signal is input to high-frequency terminal 102 atthis time, since high-frequency switches 121, 122 are in an ON-state,the signal is output to high-frequency terminal 102. Therefore, a signalhaving the same amplitude as the high-frequency input signal can bedetected at high-frequency detecting terminals 211, 212. On the otherhand, since high-frequency switches 123, 124 are in an OFF-state, if theinput amplitude is represented by V_(amp/N), amplitude V_(amp213) athigh-frequency detecting terminal 214 and amplitude V_(amp214) athigh-frequency detecting terminal 214 are related byV_(amplN)>V_(amp213)>V_(amp214)>0.

Voltage lowering circuit 161 and voltage boosting circuit 131 that areconnected respectively to high-frequency detecting terminals 211, 212detect an amplitude which is substantially the same as the amplitudeinput to high-frequency terminal 102, the output potentials from voltageboosting circuit 131 and voltage lowering circuit 161 cancel each otherand the output of potential combining circuit 171 becomes the potentialat control potential input terminal 111, as described above with respectto the eighth embodiment. With respect to voltage lowering circuit 162and voltage boosting circuit 132 that are connected respectively tohigh-frequency detecting terminals 213, 214, since the amplitude inputto the detecting terminal of the voltage lowering circuit is greaterthan the amplitude input to the detecting terminal of the voltageboosting circuit because of the relation of the input amplitude,V_(amp213)>V_(amp214), the potential difference that is lowered from thepotential at the control potential input terminal by voltage loweringcircuit 162 is greater than the potential difference that is increasedfrom the potential at the control potential input terminal by voltageboosting circuit 132. As a result, the potential at the controlterminals of high-frequency switches 123, 124 becomes lower than thepotential at control potential input terminal 112. Therefore, thedifference between the control potential input to the high-frequencyswitch in an ON-state and the control potential input to thehigh-frequency switch in an OFF-state increases as the input amplitudeof the high-frequency signal increases. Consequently, (V_(H)−V_(L)) inthe equation (1) increases. Therefore, even if the control potentialsinput to control potential input terminals 111, 112 are low, the presenthigh-frequency switch circuit can have its handling power increasedwithout having to increase the number of FETs connected in cascade.

FIG. 42 shows a specific circuit arrangement of the high-frequencyswitch circuit according to the tenth embodiment. FETs 1, 2 connected incascade and resistive elements 61, 62 connected to the respective gatesof FETs 1, 2 make up high-frequency switch 121. Similarly, FETs 3, 4 andresistive elements 63, 64 make up high-frequency switch 122. FETs 5, 6and resistive elements 65, 66 make up high-frequency switch 123, andFETs 7, 8 and resistive elements 67, 68 make up high-frequency switch124. The voltage boosting circuits and the voltage lowering circuitsemploy those in the high-frequency switch circuit shown in FIG. 37: Eachof potential dividing elements 141 to 146 employs single resistiveelement 80. Potential combining circuits 171, 172 employ the arrangementshown in FIG. 36. Resistor 173 is inserted between control potentialinput terminal 111 and the output terminal of potential combiningcircuit 171. Similarly, resistor 174 is inserted between controlpotential input terminal 112 and the output terminal of potentialcombining circuit 172.

In the above embodiment, the SPDT arrangement has basically beendescribed. However, the circuit according to the present invention isnot limited to the SPDT switch, but is also applicable to an SPnT ormultiple-input, multiple-output switch. While the high-frequencydetecting terminals are the input and output terminals of thehigh-frequency switches in the above embodiment, the cascade connectionterminal of high-frequency switches or the output terminal of ahigh-frequency switch may be used as a high-frequency detecting terminalfor the same advantages.

In the seventh, eighth, ninth, and tenth embodiments of the presentinvention, the detecting terminals are the junction betweenhigh-frequency switches or the input and output terminals of thehigh-frequency switch means. Potential dividing elements may beconnected between any two points of the junction and the input andoutput terminals, and the junctions between the potential dividingelements may be used as detecting terminals for the same advantages.

In the eighth, ninth, and tenth embodiments, if the voltage boostingcircuit and the voltage lowering circuit are of the same circuitarrangement except that the polarity of the diode element is reversed,then the most preferable advantages can be achieved. However, thevoltage boosting circuit and the voltage lowering circuit may notnecessarily be of the same circuit arrangement. If a circuit arrangementis employed for making an increase caused in the potential by thevoltage boosting circuit greater than a reduction caused in thepotential by the voltage lowering circuit, then it is possible toincrease the potential at the control terminal of the high-frequencyswitch in an ON-state and lower the potential at the control terminal ofthe high-frequency switch in an OFF-state. Conversely, a reductioncaused in the potential by the voltage lowering circuit may be madegreater than an increase caused in the potential by the voltage boostingcircuit. In these cases, too, the handling power is increased.

The preferred embodiments of the present invention have been describedwith respect to examples where N-channel FETs are employed inhigh-frequency switches. The present invention is not limited to thoseembodiments, but is also applicable to examples where P-channel FETs orpin diodes are employed in high-frequency switches. If P-channel FETsare employed, then the polarity of control potentials is reversed.High-frequency switch circuits which employ such P-channel FETs or pindiodes are included in the technical scope of attached claims.

1. A high-frequency switch circuit comprising: a plurality ofhigh-frequency switch means for passing and blocking a high-frequencysignal between an input terminal and an output terminal depending on acontrol potential applied as a control signal; detecting means fordetecting the high-frequency signal which passes through saidhigh-frequency switch means; and a control potential generating circuitfor changing the control potential applied to at least one of saidplurality of high-frequency switch means in order to increase differencebetween the control potential applied to the high-frequency switch meanswhich is in an ON-state and the control potential applied to thehigh-frequency switch means which is in an OFF-state, depending on anamplitude of the high-frequency signal detected by said detecting means.2. The high-frequency switch circuit according to claim 1, wherein saidcontrol potential generating circuit has means for increasing saidcontrol potential applied to at least the high-frequency switch meanswhich is in said ON-state and/or means for decreasing said controlpotential applied to at least the high-frequency switch means which isin said OFF-state.
 3. The high-frequency switch circuit according toclaim 1 or 2, wherein said control potential generating circuit has avoltage boosting circuit for increasing a potential depending on anamplitude of an input signal and/or a voltage lowering circuit fordecreasing a potential depending on the amplitude of said input signal.4. The high-frequency switch circuit according to claim 1, wherein saidcontrol potential generating circuit has a voltage boosting circuit forincreasing a potential depending on the amplitude of an input signal inorder to increase said control potential applied to at least thehigh-frequency switch means which is in said ON-state, depending on theamplitude of the high-frequency signal detected by said detecting means.5. The high-frequency switch circuit according to claim 1, wherein saidcontrol potential generating circuit has a voltage lowering circuit fordecreasing a potential depending on the amplitude of an input signal inorder to decrease said control potential applied to at least thehigh-frequency switch means which is in said OFF-state, depending on theamplitude of the high-frequency signal detected by said detecting means.6. The high-frequency switch circuit according to claim 1, wherein saidcontrol potential generating circuit has a voltage boosting circuit forincreasing a potential depending on an amplitude of an input signal, avoltage lowering circuit for decreasing a potential depending on theamplitude of said input signal and a potential combining circuit forcombining an output potential from said voltage boosting circuit and anoutput potential from said voltage lowering circuit into a controlpotential applied to at least one of said plurality of high-frequencyswitch means; and wherein the control potential applied to at least thehigh-frequency switch means which is in said ON-state is increased,and/or the control potential applied to at least the high-frequencyswitch means which is in said OFF-state is decreased.
 7. Thehigh-frequency switch circuit according to claim 4, wherein each of saidhigh-frequency switch means has one or more high frequency switchesconnected in cascade for passing and blocking the high-frequency signalbetween an input end and an output end depending on said control signalwhich is applied; wherein said detecting means has first and secondpotential dividing elements connected in cascade between two pointswhich are selected from junctions between the high frequency switchesconnected in cascade, the input terminals of said high-frequency switchmeans, and output terminals of said high-frequency switch means, and ajunction between said first and second potential dividing elementsserves as a detecting terminal.
 8. The high-frequency switch circuitaccording to claim 6, wherein each of said high-frequency switch meanshas one or more high frequency switches connected in cascade for passingand blocking the high-frequency signal between an input end and anoutput end depending on said control signal which is applied; whereinsaid detecting means has first and second potential dividing elementsconnected in cascade between two points which are selected fromjunctions between the high frequency switches connected in cascade,input terminals of said high-frequency switch means, and outputterminals of said high-frequency switch means, and a junction betweensaid first and second potential dividing elements serves as a detectingterminal.
 9. The high-frequency switch circuit according to claim 5,wherein each of said high-frequency switch means has one or more highfrequency switches connected in cascade for passing and blocking thehigh-frequency signal between an input end and an output end dependingon said control signal which is applied; wherein said detecting meanshas first and second potential dividing elements connected in cascadebetween two points which are selected from junctions between the highfrequency switches connected in cascade, input terminals of saidhigh-frequency switch means, and output terminals of said high-frequencyswitch means, and a junction between said first and second potentialdividing elements serves as a detecting terminal.
 10. The high-frequencyswitch circuit according to claim 6, wherein each of said high-frequencyswitch means has one or more high frequency switches connected incascade for passing and blocking the high-frequency signal between aninput end and an output end depending on said control signal which isapplied; wherein said detecting means has first and second potentialdividing elements connected in cascade between two points which areselected from junctions between the high frequency switches connected incascade, input terminals of said high-frequency switch means, and outputterminals of said high-frequency switch means, and a junction betweensaid first and second potential dividing elements serves as a detectingterminal.
 11. The high-frequency switch circuit according to claim 6,wherein each of said high-frequency switch means has one or more highfrequency switches connected in cascade for passing and blocking thehigh-frequency signal between an input end and an output end dependingon said control signal which is applied; wherein said detecting meanshas first, second, and third potential dividing elements connected incascade between two points which are selected from junctions between thehigh frequency switches connected in cascade, input terminals of saidhigh-frequency switch means, and output terminals of said high-frequencyswitch means, and a first junction between said first and secondpotential dividing elements and a second junction between said secondand third potential dividing elements serve as detecting terminals. 12.The high-frequency switch circuit according to any one of claims 7 to11, wherein each of said potential dividing elements comprises at leastone selected from a resistive element, a capacitive element, and aninductive element.
 13. The high-frequency switch circuit according toclaim 4, wherein each of said high-frequency switch means has two highfrequency switches connected in cascade for passing and blocking thehigh-frequency signal between an input end and an output end dependingon said control signal which is applied; wherein said detecting meanshas either one of a junction between said two high frequency switches,input terminals of said high-frequency switch means, and outputterminals of said high-frequency switch means, as a detecting terminal.14. The high-frequency switch circuit according to claim 5, wherein eachof said high-frequency switch means has two high frequency switchesconnected in cascade for passing and blocking the high-frequency signalbetween an input end and an output end depending on said control signalwhich is applied; wherein said detecting means has either one of ajunction between said two high frequency switches, input terminals ofsaid high-frequency switch means, and output terminals of saidhigh-frequency switch means, as a detecting terminal.
 15. Thehigh-frequency switch circuit according to claim 6, wherein each of saidhigh-frequency switch means has two or more high frequency switchesconnected in cascade for passing and blocking the high-frequency signalbetween an input end and an output end depending on said control signalwhich is applied; wherein said detecting means has either two ofjunctions between said high frequency switches connected in cascade,input terminals of said high-frequency switch means, and outputterminals of said high-frequency switch means, as detecting terminals.16. The high-frequency switch circuit according to claim 7, wherein saidvoltage boosting circuit has a control potential output terminal foroutputting the control potential applied to said high-frequency switchmeans, a signal detector connected between said detecting terminal andsaid control potential output terminal, a control signal input terminalfor being supplied with said control signal from an external circuit,and a circuit including a rectifying element connected between saidcontrol potential output terminal and said control signal inputterminal.
 17. The high-frequency switch circuit according to claim 8,wherein said voltage boosting circuit has a control potential outputterminal for outputting the control potential applied to saidhigh-frequency switch means, a signal detector connected between saiddetecting terminal and said control potential output terminal, a controlsignal input terminal for being supplied with said control signal froman external circuit, and a circuit including a rectifying elementconnected between said control potential output terminal and saidcontrol signal input terminal.
 18. The high-frequency switch circuitaccording to claim 13, wherein said voltage boosting circuit has acontrol potential output terminal for outputting the control potentialapplied to said high-frequency switch means, a signal detector connectedbetween said detecting terminal and said control potential outputterminal, a control signal input terminal for being supplied with saidcontrol signal from an external circuit, and a circuit including arectifying element connected between said control potential outputterminal and said control signal input terminal.
 19. The high-frequencyswitch circuit according to claim 9, wherein said voltage loweringcircuit has a control potential output terminal for outputting thecontrol potential applied to said high-frequency switch means, a signaldetector connected between said detecting terminal and said controlpotential output terminal, a control signal input terminal for beingsupplied with a control signal from an external circuit, and a circuitincluding a rectifying element connected between said control potentialoutput terminal and said control signal input terminal.
 20. Thehigh-frequency switch circuit according to claim 10, wherein saidvoltage lowering circuit has a control potential output terminal foroutputting the control potential applied to said high-frequency switchmeans, a signal detector connected between said detecting terminal andsaid control potential output terminal, a control signal input terminalfor being supplied with a control signal from an external circuit, and acircuit including a rectifying element connected between said controlpotential output terminal and said control signal input terminal. 21.The high-frequency switch circuit according to claim 14, wherein saidvoltage lowering circuit has a control potential output terminal foroutputting the control potential applied to said high-frequency switchmeans, a signal detector connected between said detecting terminal andsaid control potential output terminal, a control signal input terminalfor being supplied with a control signal from an external circuit, and acircuit including a rectifying element connected between said controlpotential output terminal and said control signal input terminal. 22.The high-frequency switch circuit according to any one of claims 16 to21, wherein said circuit including the rectifying element has aresistive element connected between said control potential outputterminal and said control signal input terminal, and a circuit connectedparallel to said resistive element; wherein said circuit connectedparallel to said resistive element comprises a rectifying element or aseries-connected circuit of a rectifying element and a circuit includinga resistive element; wherein said circuit including the resistiveelement has a circuit comprising a resistive element and/or an inductiveelement, or a circuit comprising a parallel-connected arrangement of acircuit comprising a resistive element and/or an inductive element and acircuit comprising at least one of a resistive element, an inductiveelement, and a capacitive element.
 23. The high-frequency switch circuitaccording to claim 11 or 15, wherein said voltage boosting circuit hasan increased potential output terminal for outputting a boostedpotential, a first control signal input terminal for being supplied witha control signal from an external circuit, a first detecting terminalfor detecting a high-amplitude signal, a circuit including a rectifyingelement connected between said first control signal input terminal andsaid increased potential output terminal, and a first signal detectorconnected between said increased potential output terminal and saidfirst detecting terminal; wherein said voltage lowering circuit has adecreased potential output terminal for outputting a lowered potential,a second control signal input terminal for being supplied with a controlsignal from an external circuit, a second detecting terminal fordetecting a high-amplitude signal, a circuit including a rectifyingelement connected between said second control signal input terminal andsaid decreased potential output terminal, and a second signal detectorconnected between said decreased potential output terminal and saidsecond detecting terminal; wherein said potential combining circuit hasa circuit including a first resistive element connected between saidincreased potential output terminal and a control potential outputterminal for outputting the control potential applied to saidhigh-frequency switch means, and a circuit including a second resistiveelement connected between said decreased potential output terminal andsaid control potential output terminal; wherein each of said circuitsincluding the resistive element has a circuit comprising a resistiveelement and/or an inductive element, or a circuit comprising aparallel-connected arrangement of a circuit comprising a resistiveelement and/or an inductive element and a circuit comprising at leastone of a resistive element, an inductive element, and a capacitiveelement.
 24. The high-frequency switch circuit according to claim 23,wherein said circuit including the rectifying element in said voltageboosting circuit has a rectifying element or a series-connected circuitof a rectifying element and a circuit including a first resistiveelement, connected between said increased potential output terminal andsaid first control signal input terminal; wherein said circuit includingthe rectifying element in said voltage lowering circuit has a rectifyingelement or a series-connected circuit of a rectifying element and acircuit including a second resistive element, connected between saiddecreased potential output terminal and said second control signal inputterminal; wherein each of said circuits including the resistive elementhas a circuit comprising a resistive element and/or an inductiveelement, or a circuit comprising a parallel-connected arrangement of acircuit comprising a resistive element and/or an inductive element and acircuit comprising at least one of a resistive element, an inductiveelement, and a capacitive element.
 25. The high-frequency switch circuitaccording to claim 23, wherein said voltage boosting circuit has acircuit including a third resistive element parallel to said rectifyingelement between said increased potential output terminal and said firstcontrol signal input terminal; wherein said circuit including the thirdresistive element has a circuit comprising a resistive element and/or aninductive element or a circuit comprising a parallel-connectedarrangement of a circuit comprising a resistive element and/or aninductive element and a circuit comprising at least one of a resistiveelement, an inductive element, and a capacitive element.
 26. Thehigh-frequency switch circuit according to claim 23, wherein saidvoltage lowering circuit has a circuit including a fourth resistiveelement parallel to said rectifying element between said decreasedpotential output terminal and said second control signal input terminal;wherein said circuit including the fourth resistive element has acircuit comprising a resistive element and/or an inductive element, or acircuit comprising a parallel-connected arrangement of a circuitcomprising a resistive element and/or an inductive element and a circuitcomprising at least one of a resistive element, an inductive element,and a capacitive element.
 27. The high-frequency switch circuitaccording to any one of claims 16 to 21, wherein each of said signaldetectors has a circuit connected by only a capacitive element or acircuit including a capacitive element, between the correspondingdetecting terminal and the corresponding potential output terminal, andsaid circuit including the capacitive element has a circuit comprising aseries-connected arrangement of an element group comprising at least oneof a resistive element, an inductive element, and a capacitive element,and a capacitive element.
 28. The high-frequency switch circuitaccording to any one of claims 7 to 11, 13 to 21, wherein each of saidhigh-frequency switches has a plurality of field-effect transistorshaving channels connected in cascade between said input terminal andsaid output terminal of the high-frequency switch, and a plurality ofresistive elements associated respectively with said field-effecttransistors and having ends connected to the gates of the correspondingfield-effect transistors and other ends connected in common forapplication of said control signal thereto.
 29. The high-frequencyswitch circuit according to claim 28, further including resistiveelements associated respectively with said field-effect transistors andinterconnecting drains and sources thereof.
 30. The high-frequencyswitch circuit according to any one of claims 1, 2, 4 to 11, 13 to 21,wherein said control potential generating circuit is associated witheach of said high-frequency switch means.